Functional Reconfiguration for Fault-tolerance: a New Approach

Reliability and speed are two main requirements of a VLSI design. Rapidly increasing device densities cause serious reliability concerns that have been mostly addressed using fault reconfiguration. Another kind of reconfiguration, is functional reconfiguration, which is widely used to provide a better performance by improving the processor-application match. Though fault reconfiguration and functional reconfiguration have been studied extensively, not much effort has been made to integrate them. With the advent of field programmable technology, which enables run-time processor reconfiguration, we have the scope to integrate both fault-tolerant reconfiguration and functional reconfiguration within a processor. In this paper, we present a unified approach using a continuous time, finite state, two-dimensional Markov chain. We also introduce a new measure α(i), the computational proportionality constant of unit type i to calculate the computational availability of the processor. Due to the complexity of the proposed model, numerical methods are used to study the performance related measures.